In many data processing applications, it may be required that certain data stored in one or more memory regions be continuously, or periodically, monitored and analyzed by a particular client to ensure the integrity of the data in these regions of memory. A secure protocol may be utilized to ensure that the content stored in memory is not changed, replaced, or in any way tampered with, by piracy attempts and/or unauthorized users.
With regard to robust protection of data against tampering, information bearing signals should be protected so as to eliminate unauthorized interception and access by a third party. Some conventional signal security methods utilize signal scrambling where the scrambled signal content is not readily discernable by a receiving party. Efficient scrambling of different kinds of signals such as multimedia broadcasts, for example, may be achieved in such a manner that there is no perceptible deterioration in signal quality when these signals are being restored. With either a conditional access (CA) system or a copy protection system, private or secure keys may be utilized for scrambling and/or descrambling high-value content or for protecting highly sensitive transactions. In a CA system, a content scrambling key is utilized and this content scrambling key has to be protected.
For a complex computer or a System on Chip (SoC) integrated circuit solution, there may be many clients in the SoC that access the memory for fetching instructions and/or data, for example. In addition, clients may be adapted to exchange information with each other via a communication bus. Such clients within the SoC may be adapted to access the memory through a memory bus. An unauthorized user may attempt to tap into the memory bus or the communication bus from outside of the SoC in order to monitor the data access patterns of the SoC clients and to attempt an unauthorized signal access. Furthermore, a plurality of clients that are external or internal to the SoC may attempt an unauthorized access to one or more regions of the on-chip memory, or to one or more of the clients within the chip.
A client or a CPU within the SoC integrated circuit may be adapted to verify operation of the remaining clients within the chip and whether an unauthorized access attempt has been performed by an unauthorized user. However, an unauthorized user may attempt to tap into the memory bus, the communication bus or any of the clients during, for example, a boot sequence for initially booting the chip prior to operation. Since the verifying functionality of the clients within the chip may be suspended during the boot sequence, it may be difficult to prevent an unauthorized attempt to access the chip, such as an attempt to read and/or write to the on-chip memory.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.